Current mode sense amplifiers (CSAs) have been used in integrated circuits to sense and amplify differential input currents. For example, in applications in semiconductor memory, the CSAs are often used to sense and amplify input currents resulting from reading memory cell data and being provided over relatively long signal lines. As a result, the input currents may be very weak and low in magnitude. In applications such as these, control of the CSA's loop gain may be important because it affects the operating characteristics of the CSA. That is, where the loop gain of a CSA is approximately equal to 1, the dominant mode of operation for the CSA is sensing differential input currents. In contrast, as the loop gain of a CSA increases to be greater than 1, the dominant mode of operation for the CSA transitions from current sensing to behaving as a latch circuit. Thus, controlling loop gain may be desirable in order to control the behavior of the CSA.
FIG. 1A illustrates a conventional current mode sense amplifier (CSA) 100. The
CSA 100 includes a pair of cross coupled n-type field effect transistors (n-FETs) 102, 104 (e.g. n-channel metal-oxide semiconductor transistors (NMOS)) and diode coupled n-FET transistors 108, 110. n-FET bias transistors 112, 114 are coupled to the n-FET transistors 102, 104 and biased by a bias voltage Vbias. Differential input currents are applied to the input-output nodes IO, IOb to be sensed and amplified by the CSA 100. As known, the loop gain of the CSA 100 is gmR, where gm is the transconductance of n-FET transistors 102, 104 and R is the load provided by the n-FET transistors 108, 110. As also known, the load for the diode coupled n-FET transistors 108, 110 is 1/gm. As a result, the loop gain for the CSA 100 is approximately 1, and the loop gain remains substantially constant despite variations in factors affecting gm, such as process, voltage, and temperature (PVT). Although the CSA 100 may have the benefit of a being able to maintain a substantially constant loop gain for changes in PVT, for operation a supply voltage Vcc for the CSA 100 should be greater than the sum of the threshold voltages of the transistors 102 (or 104) and transistors 108 (or 110), and a voltage margin for operation. In low voltage, low power systems, however, providing a supply voltage of this level is not desirable.
FIG. 1B illustrates another conventional CSA 150. The CSA 150 includes cross coupled n-FET transistors 102, 104 and bias transistors 112, 114, as in the CSA 100. However, the diode coupled n-FET transistors 108, 110 of the CSA 100 have been replaced by p-type field effect transistors (p-FETs) 158, 160 to provide load R. An advantage of the CSA 150 over the CSA 100 may be that a Vcc can be less than that for CSA 100. The Vcc only needs to be greater than the threshold voltage of the transistors 102 (or 104) plus a voltage margin, which is one transistor threshold voltage less than for the CSA 100. As with CSA 100, the loop gain of the CSA 150 is gmR. In contrast to the diode coupled n-FET transistors 108, 110, the load provided by the p-FET transistors 158, 160 are not correlated with gm. As a result, the loop gain for the CSA 150 may vary more than the loop gain for the CSA 100 of FIG. 1 would vary with variations in PVT. As previously discussed, a greater variance of loop gain may cause the CSA's operating characteristics to vary greater with PVT as well, which is typically an undesirable situation.